Efficiency and reliability enhancement of silicon nanocrystal field-effect luminescence from nitride-oxide gate stacks

We report on a field-effect light emitting device based on silicon nanocrystals in silicon oxide deposited by plasma-enhanced chemical vapor deposition. The device shows high power efficiency and long lifetime. The power efficiency is enhanced up to 0.1% by the presence of a silicon nitride control layer. The leakage current reduction induced by this nitride buffer effectively increases the power efficiency two orders of magnitude with regard to similarly processed devices with solely oxide. In addition, the nitride cools down the electrons that reach the polycrystalline silicon gate lowering the formation of defects, which significantly reduces the device degradation. © 2008 American Institute of Physics. DOI: 10.1063/1.2939562

2][3][4][5][6] In the last years, an increasing number of articles dealing with electroluminescence ͑EL͒ from Si-nc embedded in silicon oxide ͑Si-nc/ SiO 2 ͒ devices has been published.Many of them report emission under direct current ͑dc͒ polarization, [7][8][9] which usually leads to low emission efficiency and fast degradation.Other authors report emission under alternate current ͑ac͒ polarization, 3,10,11 applying the concept of field-effect luminescence, where the recombination takes place after the sequential injection from the substrate of electrons and holes.
The alternate injection can be adjusted to a suitable duty cycle which optimizes not only the current flow but also the polarization stress and the device lifetime.In spite of this, the leakage current is still very high and, also in this case, leads to low power efficiencies. 10Therefore, the reduction of the leakage current appears to be a key issue for the achievement of an efficient device.3][14] The MNOS stack reduces the effective field in the oxide layer, lowering the current flow that, in MOS configurations, is strongly field dependent ͓Fowler-Nordheim ͑FN͔͒. 15The additional nitride barrier hinders the gate injection without significantly affecting the injection from the substrate, thus enhancing the power efficiency, as will be demonstrated later on.Thanks to the thinness of the Si 3 N 4 buffer and to its relatively high dielectric constant, the overall thickness increase does not have a remarkable impact on the gate voltage.The device lifetime improves as the nitride matrix cools down the carriers from the oxide, reducing the damage generated at the polycrystalline silicon ͑top contact͒ interface.
In the present work, we demonstrate a twofold improvement through the addition of a thin Si 3 N 4 control layer within the MOS stack.First, we show that the power efficiency is increased up to ϳ0.1% ͑two orders of magnitude larger than the one obtained in identically processed MOS structures͒ as a direct consequence of the leakage current reduction that takes place for comparable voltages and output emitting powers.Second, measurable reduction of the device degradation is also demonstrated.
Two different types of metal-insulator-semiconductor structures have been fabricated.The first one is a MNOS structure with a pure nitride ϳ15-nm-thick control layer deposited onto an ϳ55 nm Si-nc/ SiO 2 layer with roughly ϳ20% of Si excess, which plays the role of active layer.The second set of devices presents a typical MOS configuration with the same oxide thickness ͑ϳ55 nm͒ and similar Si excess.The silicon-rich silicon oxide layers were deposited on a p-type Si substrate ͑0.1-1.4 ⍀ cm͒ by plasma-enhanced chemical vapor deposition ͑CVD͒ and submitted to high temperature annealing.More experimental details are given elsewhere. 10The addition of the nitride layer was performed by low-pressure CVD at 800 °C and 26.66 Pa with a NH 3 ͑ammonia͒ and SiH 2 Cl 2 ͑dichlorosilane͒ mixture.N-doped semitransparent polycrystalline silicon ͑poly-Si͒ 250 nm thick was deposited as a contact layer on both samples.Transmittance spectroscopy of poly-Si layers deposited onto fused silica wafers was performed in order to check its transparency.Finally, aluminum pads were deposited for an easier probe connection.The devices were biased by bipolar square waves from an Agilent 8114A Pulse Generator.Timeresolved EL was detected by a photon-counting setup basically composed of a Hamamatsu H7422-50 photomultiplier.The EL spectra were measured by a Princeton Instruments 100B-LN charge coupled device camera and an Oriel MS257 1 / 4 m Monochromator.Quasistatic I-V ͑current-voltage͒ characteristics were measured by an Agilent B1500 semiconductor device analyzer.
The schematics of Fig. 1͑a͒ show some basic principles of MNOS structures.The nitride buffer reduces the applied field in the oxide ͑barrier height increase͒, leading to a decrease in the current density ͑i͒.Diagrams ͑ii͒ and ͑iii͒ represent the probabilities of electron injection from the gate a͒ Electronic mail: mperalvarez@el.ub.es.and the substrate, respectively, which are related to the inverse of the lighted areas.Whereas the nitride barrier strongly hinders the carrier injection from the gate, ͑ii͒, its influence on the substrate injection, responsible of the fieldeffect luminescence, is negligible ͑iii͒.Figure 1͑b͒ represents the field-effect luminescence spectra of MNOS and MOS devices under application of 26 V square wave voltages.As represented in the inset, most of the emission is triggered by the rise edge of the applied voltage, when the electrons are injected into positively charged Si-nc.The contribution of the fall-edge transient is very small, mainly due to the shorter retention times of the previously stored electrons. 11In both cases, the rise time of the emission is around 0.2 s, whereas the decay time is close to 10 s.The spectra have been normalized to their own maxima in order to make easier the comparison of their spectral features.The emission range matches the typical Si-nc/ SiO 2 emission. 2,3The spectral shapes are very similar, even though their full width at half maximum is narrower ͑close to ϳ90 nm, i.e., ϳ0.190 eV͒ than the one obtained in similar samples under optical pumping. 16This can be attributed to interference effects caused by multiple reflections in the poly-Si layer, as revealed by transmittance measurements ͑figure not shown͒.The small peak shift is attributed to the different refractive index contrast at the poly-Si/insulator interface that modifies the interference pattern of the stack.Figure 2͑a͒ shows the integrated EL for both devices as a function of the driving voltage.It is worth noting that, in both cases, the onset of the emission is placed at about ϳ20 V, indicating that the nitride layer does not have a sizable impact on the operation voltage.This agrees with the relatively small estimated voltage drop in the nitride layer ͑ϳ14% of the gate voltage͒ and the similarity in the current values measured at the onset of the emission ͓see Fig. 2͑b͔͒.The quasistatic current-voltage measurements show a strong reduction of the current in MNOS structures compared to MOS devices.This reduction represents the base of the power efficiency improvement, as we demonstrate hereafter.In conventional MNOS structures ͑without Si-nc͒, the overall current is the result of the balance between two different injection mechanisms that take place in the SiO 2 and the Si 3 N 4 .The measured gate current is ruled by the less conductive layer, role defined by the device characteristics.This current consists of carriers tunneling from the substrate to the oxide conduction band by FN mechanism and being trapped at the oxide-nitride interface where the carriers are promoted to the poly-Si contact by Poole-Frenkel ͑PF͒ mechanism. 12,13,17In our devices, the current can be interpreted in a similar way, even though the FN tunneling is now assisted by the Si-nc.Figure 2͑b͒ reveals that above ϳ20 V ͑emission range͒, the current in MNOS devices can be separated in two different regimes.Close to the threshold voltage, the current is well fitted by PF injection, implying that in this I-V region, the nitride layer plays the role of limiting layer.As the voltage is further increased, the Fermi level of the Si substrate raises, overcoming the nitride conduction band and promoting the carriers to the gate without "seeing" the nitride layer.As extracted from Fig. 2͑b͒, the overall current in this range follows a FN law with typical barrier heights of 1.6-1.9eV, in good agreement with values obtained from FN fittings in MOS structures with Si-nc ͑from 1.8 to 2.2 eV͒.If one assumes that the FN current through the oxide in the MNOS structure is approximately the same than that measured for the MOS structure, then Fig. 2͑b͒ demonstrates the current reduction induced by the nitride layer.This assumption is justified by the small estimated voltage drop in the silicon nitride ͑ϳ14% ͒ and the small variation of the effective barrier height, calculated from the I-V hysteresis, which is about 10% of the calculated height.The low current level involved results into high power efficiencies, as represented in Fig. 3͑a͒.The MNOS structure exhibits a mean power efficiency of about ϳ0.1% that slightly varies in a broad range of voltages.This behavior differs from the one observed in MOS structures, where the benefit in the output optical power by increasing the gate voltage does not compensate the electrical power dissipation, due to the high leakage current flowing through the stack.Taking also into account the different emission intensities observed in Fig. 2͑a͒, it becomes clear that the benefit of the nitride layer is twofold, as not only it reduces the device current flow but also improves the luminescence intensity.This implies a better profit of the injected charge, which is the basis of the efficiency enhancement.
The structures were submitted to accelerating aging for more than 24 h of continuous operation under application of 30 V bipolar square waves at 1 kHz.The emission intensity from MNOS structures slowly decreased, attaining a relatively high emission level, ϳ91%.In contrast, the emission from MOS devices dropped to ϳ79% of its original value.This demonstrates a general improvement of the device endurance under alternate biasing, underlining the superior reliability of MNOS structures, compared to MOS.This improvement is clearly shown in Fig. 3͑b͒, where the degradation is represented as function of the operation time.The degradation rate in MNOS is about ϳ50% slower than that observed in MOS devices, so that the resulting lifetime is considerably longer.This trend is well fitted by a logarithmic function of time within the experimental timescale, 18 and results in extrapolated device lifetimes of few months.
In conclusion, the fabrication of Si-nc based devices with a thin silicon nitride layer enhances the power efficiency up to 0.1%.This increase is mainly due to the reduction in the leakage current that not only favors a decrease in the power consumption but also enhances the injection to the Si-nc.The control layer has no noticeable effect on the threshold voltage, due to the high dielectric constant and the thinness of the added layer.MNOS LEDs show a significant increase of the endurance, reducing the degradation rate down to 50%.This work was partially supported by the project MILES-SILUZ: TEC2006-13907/MIC, financed by the Spanish Ministry of Education and Science. A. Morales and J. Barreto acknowledge the grants received from CONACyT-FC and CSIC ͑I3P͒, respectively.M. Perálvarez acknowledges Dr. Paolo Pellegrino.

FIG. 1 .
FIG.1.͑a͒ Band structure of MNOS devices.͑i͒ The oxide barrier increases due to the control layer addition.͓͑ii͒ and ͑iii͔͒ The probability of carrier injection from the substrate is higher than that for gate injection as revealed by the different lighted areas which are related to the inverse of the injection probability.͑b͒ Comparison of EL spectra from MOS and MNOS structures.In the inset, a typical time-resolved scheme of the field-effect emission is represented.