Please use this identifier to cite or link to this item: http://hdl.handle.net/2445/102565
Title: Wideband pulse amplifiers for the integrated cameras of the Cherenkov Telescope Array
Author: Sanuy Charles, Andreu
Director: Gascón Fora, David
Miribel-Català, Pere Ll. (Pere Lluís)
Keywords: Microelectrònica
Telescopis
Disseny de circuits electrònics
Microelectronics
Telescopes
Electronic circuit design
Issue Date: 4-Feb-2016
Publisher: Universitat de Barcelona
Abstract: [eng] One type of photon detector is the photomultiplier tube (or PMT), most commonly used in Imaging Atmospheric Cherenkov Telescopes (IACTs). A PMT has a photoelectric cathode that absorbs light and emits an electron. A PMT also contains other electrodes in sequence called dynodes. Each dynode is kept at a higher voltage than the preceding one. Electrons are attracted to each successive dynode, and upon striking the dynode they knock off several additional electrons from the dynode. As the electron stream travels from dynode to dynode, more and more electrons are emitted as a cascade. The pulses generated by the photo sensors (typically PMTs), need to be sampled very fast in order to determine with high precision its arrival time. A typical 2.5 ns width pulse from a PMT needs to be sampled at 800 MHz according to Nyquist theorem, being 1 Gs/s a typical sampling frequency. Considering that an IACT camera can have around 1000 pixels and 8 quantization levels, a continuous recording of the signals from all the pixels in a camera would mean a data rate of 1 TB/s, which is unmanageable. Instead of that, IACTs only records continuously when an interesting event is detected. In order to do that, they uses a data acquisition system based on analogue memories with a complex trigger system. This analogue memories sample the input signals at high sample rate, but with small buffers mounted on a dedicated ring configuration. The NECTAr's (New Electronics for the Cherenkov Telescope Array) front end (FE) option for the camera of the CTA (which is this thesis focused) is a 16 bits and 1— 3 GS/s sampling chip based on analogue memories. The trigger system, analyzes each pulse, and decides if the signal corresponds to a valid Cherenkov event to be stored or not. According to the CTA consortium requirements, the camera specification needs dedicated electronic circuits out of the specifications of the commercial components in the market. Due to cost effective and state of the art innovation, some full custom ASICs have been developed. The aim of this thesis is to develop a full amplification channel path to inject the fast pulses coming from the camera sensors to the analogue memories of the digitizer circuitry. Based on the hard constrains of the amplification channel path for the CTA project, new technologies are applied to cover on one hand, the required wideband at the low noise level and, on the other hand decrease the power consumption required as much as possible. A first amplification stage is based on a wideband current mode preamplifier with 16 bits DR. We propose a novel current mode circuit to overcome the maximum signal limitation by creating multiple gain paths at the very front end of the input stage. The input current is split in the common base input stage into two output scaled currents. Finally, the current signal is converted to voltage by a closed loop transimpedance amplifier. A fully closed loop solution based on voltage feedback amplifiers (OTA or OpAmp) is not feasible because a Gain-bandwidth (GBW) product of more than 8 GHz is required, and the maximum GBW product that can be achieved in a 0.35 [tm CMOS technology is well below 1 GHz. An alternative approach based on linearized high frequency (HF) transconductors is explored for a second amplification stage, which includes dedicated circuitry to adjust the DC offset in order to be properly DC coupled to the NECTArO ADC, and is followed by a high swing current to voltage conversion, and finally a low output impedance closed loop buffer is used to drive a capacitive load.
[cat] Aquesta tesi està centrada en un nou disseny de circuits per a la senyal d'entrada d'una càmera per a un telescopi Cherenkov on l'amplificació es divideix en dos etapes de guany per tal de aconseguir els requeriments del projecte. La primera etapa presenta un innovador disseny d'un preamplificador de baix soroll i gran ample de banda (BW) mentre que la segona etapa d'amplificació presenta un nou desenvolupament d'un circuït de guany, sent impossible d'aconseguir mitjançant els esquemes clàssics en a la tecnologia requerida. Aquesta segona etapa també adapta el senyal per a les posteriors parts electròniques del sistema de lectura de les càmeres dels telescopis Cherenkov. La primera etapa pre-amplificadora aconsegueix els requeriments mitjançant un innovador disseny que compleix totes les restriccions amb un baix consum. La solució escollida està basada en un nou circuit en mode corrent, creant múltiples camins de guany en les primeres parts de l'etapa d'entrada de la electrònica de lectura, d'aquesta manera podem aconseguir simultàniament prestacions de gran rang dinàmic, baix soroll, baixa impedància d'entrada, baix voltatge i baix consum. La etapa pre-amplificadora també incorpora un amplificador de transimpedància de llaç tancat amb una innovadora etapa de sortida de tipus AB dissenyada amb tecnologia SiGe 0.35 grn, permetent al disseny atacar línies de transmissió (típicament de 50 C) de càrrega) i mantenint el gran BW amb un moderat consum de potència. Aquesta tesi presenta un mètode alternatiu per a implementar amplificadors de polsos completament diferencials, aconseguint el guany desitjat i preservant a la vegada el gran BW. La linealitat en polsos ràpids es troba al nivell de solucions basades en OTA retro-alimentats limitats per la tassa de canvi (SR) i altres qüestions transitòries. Un amplificador en tecnologia CMOS de 0.35 grn implementa i valida el producte de guany-amplada de banda de 8 GHz oferint al mateix temps un gran marge d'ajust. Aquest disseny també incorpora un amplificador de transimpedància de llaç tancat amb una innovadora etapa de sortida de tipus AB basada en el disseny de la primera etapa amplificadora, però dissenyada en tecnologia CMOS de 0.35 grn, la qual resulta molt mes difícil d'aconseguir.
URI: http://hdl.handle.net/2445/102565
Appears in Collections:Tesis Doctorals - Departament - Electrònica

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