Please use this identifier to cite or link to this item: http://hdl.handle.net/2445/98400
Title: Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition
Author: Dosev, D.
Puigdollers i González, Joaquim
Orpella, Albert
Voz Sánchez, Cristóbal
Fonrodona Turon, Marta
Soler Vilamitjana, David
Marsal Garví, Lluís F. (Lluís Francesc)
Pallarés Curto, Jordi
Bertomeu i Balagueró, Joan
Andreu i Batallé, Jordi
Alcubilla González, Ramón
Keywords: Pel·lícules fines
Silici
Estabilitat
Semiconductors
Deposició química en fase vapor
Thin films
Silicon
Stability
Semiconductors
Chemical vapor deposition
Issue Date: 2001
Publisher: Elsevier B.V.
Abstract: The stability under gate bias stress of unpassivated thin film transistors was studied by measuring the transfer and output characteristics at different temperatures. The active layer of these devices consisted of in nanocrystalline silicon deposited at 125 °C by Hot-Wire Chemical Vapour Deposition. The dependence of the subthreshold activation energy on gate bias for different gate bias stresses is quite different from the one reported for hydrogenated amorphous silicon. This behaviour has been related to trapped charge in the active layer of the thin film transistor.
Note: Versió postprint del document publicat a: http://dx.doi.org/10.1016/S0040-6090(00)01608-4
It is part of: Thin Solid Films, 2001, vol. 383, num. 1-2, p. 307-309
Related resource: http://dx.doi.org/10.1016/S0040-6090(00)01608-4
URI: http://hdl.handle.net/2445/98400
ISSN: 0040-6090
Appears in Collections:Articles publicats en revistes (Física Aplicada)

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