#
# Makefile
#
# by: Joan Gimeno
#
# This is the makefile that generates the objects and the executables
TAYLOR 	=taylor

CC 	= gcc
CFLAGS 	=-O2 -fopenmp
LFLAGS	=-lm -fopenmp

.SUFFIXES: .o
%.o: $(TAYLOR)-%.c
# 	$(TAYLOR) -name $(subst -,_,$*) -o $(TAYLOR)-$*.h -header $*.txt
# 	$(TAYLOR) -name $(subst -,_,$*) -o $(TAYLOR)-$*.c -headername $(TAYLOR)-$*.h -jet -step $*.txt
	$(CC) $(CFLAGS) -c $(TAYLOR)-$*.c -o $@

# Default target executed when no arguments are given to make.
.PHONY: clean 
clean:
	-rm *.o

.PHONY: cleanobj
cleanobj:
	-rm *.o


# Help Target
.PHONY : help
help:
	@echo "The following are some of the valid targets for this Makefile:"
	@echo "... clean"
	@echo "... cleanobj"