#
# test_lib/Makefile
#	Makefile
#
# by: Joan Gimeno
#
# This is the makefile that generates the objects and the executables
LIBDIR	=../lib
FILE_L	=pic
BUILDDIR=build

CC 	= gcc
CFLAGS 	= -O2
LFLAGS	= -lm -fopenmp

FILES_C = test1.c \
	test2.c \
	test3.c

FILES_O =$(subst .c,.o,$(FILES_C))
#DFILES_O=$(addprefix $(BUILDDIR)/,$(FILES_O))
DFILES_O=$(FILES_O)

FILES_EXE=$(subst .c,.exe,$(FILES_C))
DFILES_EXE=$(addprefix $(BUILDDIR)/,$(FILES_EXE))

.SUFFIXES: .c .o .exe

%.o: %.c 
	$(CC) $(CFLAGS) -c $< -o $@

%.exe: %.o 
	$(CC) -static $< -L $(LIBDIR) -l $(FILE_L) -o $(BUILDDIR)/$@ $(LFLAGS)

# Default target executed when no arguments are given to make.
.PHONY: default_target
default_target: all

.PHONY: all
all: 
	-mkdir -p $(BUILDDIR)
	$(MAKE) $(FILES_EXE)

.PHONY: clean 
clean:
	-rm -f $(DFILES_O) $(DFILES_EXE) -rf $(BUILDDIR)

.PHONY: cleanobj
cleanobj:
	-rm -f $(DFILES_O)

# Help Target
.PHONY : help
help:
	@echo "The following are some of the valid targets for this Makefile:"
	@echo "... all (the default if no target is provided)"
	@echo "... clean"
	@echo "... cleanobj"