Sanmukh, AnandGómez, SergioComerma Montells, AlbertMauricio Ferré, JoanManera Escalero, RafelSanuy Charles, AndreuGuberman, DanielCatala, RogerEspinya, AlbertOrta, MarinaDe la Torre, OscarGascón Fora, David2024-11-062024-11-062024-05-031001-8042https://hdl.handle.net/2445/216277The BETA application-specific integrated circuit (ASIC) is a fully programmable chip designed to amplify, shape and digitize the signal of up to 64 Silicon photomultiplier (SiPM) channels, with a power consumption of approximately $$\sim$$1 mW/channel. Owing to its dual-path gain, the BETA chip is capable of resolving single photoelectrons (phes) with a signal-to-noise ratio (SNR) >5 while simultaneously achieving a dynamic range of $$\sim$$4000 phes. Thus, BETA can provide a cost-effective solution for the readout of SiPMs in space missions and other applications with a maximum rate below 10 kHz. In this study, we describe the key characteristics of the BETA ASIC and present an evaluation of the performance of its 16-channel version, which is implemented using 130 nm technology. The ASIC also contains two discriminators that can provide trigger signals with a time jitter down to 400 ps FWHM for 10 phes. The linearity error of the charge gain measurement was less than 2% for a dynamic range as large as 15 bits.17 p.application/pdfengcc-by (c) Sanmukh, Anand, et al., 2024http://creativecommons.org/licenses/by/3.0/es/Circuits integratsSiliciDisseny de circuits electrònicsIntegrated circuitsSiliconElectronic circuit designinfo:eu-repo/semantics/article7482292024-11-06info:eu-repo/semantics/openAccess