Please use this identifier to cite or link to this item: http://hdl.handle.net/2445/8761
Title: Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology
Author: Bafleur, Marise
Buxo, Juan
Puig i Vidal, Manuel
Givelin, P.
Macary, V.
Sarrabayrouse, G.
Keywords: Circuits integrats
Circuits electrònics
MOS integrated circuits
Power integrated circuits
Switching circuits
Issue Date: 1993
Publisher: IEEE
Abstract: The aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up.
Note: Reproducció del document publicat a http://dx.doi.org/10.1109/16.216442
It is part of: IEEE Transactions on Electron Devices, 1993, vol. 40, núm. 7, p. 1340-1342.
URI: http://hdl.handle.net/2445/8761
ISSN: 0018-9383
Appears in Collections:Articles publicats en revistes (Electrònica)

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