Please use this identifier to cite or link to this item:
http://hdl.handle.net/2445/119321
Title: | Matrix: a 15 ps resistive interpolation TDC ASIC based on a novel regular structure |
Author: | Mauricio, J. Gascón Fora, David Ciaglia, D. Gómez, S Fernández, G. Sanuy Charles, Andreu |
Keywords: | Disseny de circuits electrònics Circuits integrats a molt gran escala Electronic circuit design Large scale integration of circuits |
Issue Date: | 19-Dec-2016 |
Publisher: | Institute of Physics (IOP) |
Abstract: | This paper presents a 4-channel TDC ASIC with the following features: 15-ps LSB (9.34 ps after calibration), 10-ps jitter, < 4-ps time resolution, up to 10 MHz of sustained input rate per channel, 45 mW of power consumption and very low area (910×215 μm2) in a commercial 180 nm technology. The main contribution of this work is the novel design of the clock interpolation circuitry based on a resistive interpolation mesh circuit (patented), a two-dimensional regular structure with very good properties in terms of power consumption, area and low process variability. |
Note: | Reproducció del document publicat a: https://doi.org/10.1088/1748-0221/11/12/C12047 |
It is part of: | Journal of Instrumentation, 2016, vol. 11, num. 12, p. 1-9 |
URI: | http://hdl.handle.net/2445/119321 |
Related resource: | https://doi.org/10.1088/1748-0221/11/12/C12047 |
ISSN: | 1748-0221 |
Appears in Collections: | Articles publicats en revistes (Física Quàntica i Astrofísica) Articles publicats en revistes (Institut de Ciències del Cosmos (ICCUB)) |
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