Please use this identifier to cite or link to this item:
http://hdl.handle.net/2445/183380
Title: | MATRIX16: A 16-Channel Low-Power TDC ASIC with 8 ps Time Resolution |
Author: | Mauricio, Joan Freixas, Lluis Sanuy Charles, Andreu Gomez, Sergio Manera, Rafel Marin, Jesus Perez, Jose M. Picatoste Olloqui, Eduardo Rato, Pedro Sanchez, David Sanmukh, Anand Vela, Oscar Gascón Fora, David |
Keywords: | Disseny de circuits electrònics Circuits integrats Electronic circuit design Integrated circuits |
Issue Date: | 1-Aug-2021 |
Publisher: | MDPI |
Abstract: | This paper presents a highly configurable 16-channel TDC ASIC designed in a commercial 180 nm technology with the following features: time-of-flight and time-over-threshold measurements, 8.6 ps LSB, 7.7 ps jitter, 5.6 ps linearity error, up to 5 MHz of sustained input rate per channel, 9.1 mW of power consumption per channel, and an area of 4.57 mm2 . The main contributions of this work are the novel design of the clock interpolation circuitry based on a resistive interpolation mesh circuit and the capability to operate at different supply voltages and operating frequencies, thus providing a compromise between TDC resolution and power consumption. Keywords: TDC; time-to-digital converter; fast timing; PET; VLSI; ASIC; ToF; ToT; low power; frontend electronics |
Note: | Reproducció del document publicat a: https://doi.org/10.3390/electronics10151816 |
It is part of: | Electronics, 2021, vol. 10, num. 15, p. 1-16 |
URI: | http://hdl.handle.net/2445/183380 |
Related resource: | https://doi.org/10.3390/electronics10151816 |
ISSN: | 2079-9292 |
Appears in Collections: | Articles publicats en revistes (Institut de Ciències del Cosmos (ICCUB)) Articles publicats en revistes (Física Quàntica i Astrofísica) |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
717291.pdf | 6.07 MB | Adobe PDF | View/Open |
This item is licensed under a Creative Commons License