Low-power SiPM readout BETA ASIC for space applications

dc.contributor.authorSanmukh, Anand
dc.contributor.authorGómez, Sergio
dc.contributor.authorComerma Montells, Albert
dc.contributor.authorMauricio Ferré, Joan
dc.contributor.authorManera Escalero, Rafel
dc.contributor.authorSanuy Charles, Andreu
dc.contributor.authorGuberman, Daniel
dc.contributor.authorCatala, Roger
dc.contributor.authorEspinya, Albert
dc.contributor.authorOrta, Marina
dc.contributor.authorDe la Torre, Oscar
dc.contributor.authorGascón Fora, David
dc.date.accessioned2024-11-06T15:38:07Z
dc.date.available2024-11-06T15:38:07Z
dc.date.issued2024-05-03
dc.date.updated2024-11-06T15:38:07Z
dc.description.abstractThe BETA application-specific integrated circuit (ASIC) is a fully programmable chip designed to amplify, shape and digitize the signal of up to 64 Silicon photomultiplier (SiPM) channels, with a power consumption of approximately $$\sim$$1 mW/channel. Owing to its dual-path gain, the BETA chip is capable of resolving single photoelectrons (phes) with a signal-to-noise ratio (SNR) >5 while simultaneously achieving a dynamic range of $$\sim$$4000 phes. Thus, BETA can provide a cost-effective solution for the readout of SiPMs in space missions and other applications with a maximum rate below 10 kHz. In this study, we describe the key characteristics of the BETA ASIC and present an evaluation of the performance of its 16-channel version, which is implemented using 130 nm technology. The ASIC also contains two discriminators that can provide trigger signals with a time jitter down to 400 ps FWHM for 10 phes. The linearity error of the charge gain measurement was less than 2% for a dynamic range as large as 15 bits.
dc.format.extent17 p.
dc.format.mimetypeapplication/pdf
dc.identifier.idgrec748229
dc.identifier.issn1001-8042
dc.identifier.urihttps://hdl.handle.net/2445/216277
dc.language.isoeng
dc.publisherElsevier
dc.relation.isformatofReproducció del document publicat a: https://doi.org/10.1007/s41365-024-01419-z
dc.relation.ispartofNuclear Science and Techniques, 2024, vol. 35, num.3, p. 1-17
dc.relation.urihttps://doi.org/10.1007/s41365-024-01419-z
dc.rightscc-by (c) Sanmukh, Anand, et al., 2024
dc.rights.accessRightsinfo:eu-repo/semantics/openAccess
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/es/*
dc.sourceArticles publicats en revistes (Física Quàntica i Astrofísica)
dc.subject.classificationCircuits integrats
dc.subject.classificationSilici
dc.subject.classificationDisseny de circuits electrònics
dc.subject.otherIntegrated circuits
dc.subject.otherSilicon
dc.subject.otherElectronic circuit design
dc.titleLow-power SiPM readout BETA ASIC for space applications
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/publishedVersion

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