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Article

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Published version

Publication date

1993

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Please use this identifier to cite or link to this item: https://hdl.handle.net/2445/8761

Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology

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Volume Title

Related resource

http://dx.doi.org/10.1109/16.216442

Abstract

The aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up.

Subject

Circuits integrats, Circuits electrònics

Subject (English)

MOS integrated circuits, Power integrated circuits, Switching circuits

Citation

Collections

Articles publicats en revistes (Enginyeria Electrònica i Biomèdica)

Citation

BAFLEUR, Marise, et al. Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology. IEEE Transactions on Electron Devices. 1993. Vol. 40, num. 7, pags. 1340-1342. ISSN 0018-9383. [consulted: 10 of August of 2026]. Available at: https://hdl.handle.net/2445/8761

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